Principal ASIC Design Verification Engineer - UVM, PCIe, CXL
San Jose, CA
Full-TimeOn-Site$180,000 - $240,000 /yr
Posted September 18, 2023
Job Title: Principal ASIC Design Verification Engineer - UVM, PCIe, CXL
Job Location: San Jose, CA
Compensation: $180K - $240K base Depending on experience plus stock options!
Requirements: ASIC Design, Verification, UVM, PCIe, CXL
We were founded in 2020 by a team of veterans in Silicon Valley, and our mission is to accelerate AI computing in data centers and HPC by introducing high-performance, power efficient, scalable and cost-effective interconnect solutions. AI computing and data center architectures are undergoing a fundamental transformation of disaggregation and composability, driven by the enablement of CXL (Computing Express Link) technology.
We are working on a CXL/PCIe-based chip for cloud computing applications. We're expanding our team and looking to add a Principal ASIC Design Verification Engineer.
Job Location: San Jose, CA
Compensation: $180K - $240K base Depending on experience plus stock options!
Requirements: ASIC Design, Verification, UVM, PCIe, CXL
We were founded in 2020 by a team of veterans in Silicon Valley, and our mission is to accelerate AI computing in data centers and HPC by introducing high-performance, power efficient, scalable and cost-effective interconnect solutions. AI computing and data center architectures are undergoing a fundamental transformation of disaggregation and composability, driven by the enablement of CXL (Computing Express Link) technology.
We are working on a CXL/PCIe-based chip for cloud computing applications. We're expanding our team and looking to add a Principal ASIC Design Verification Engineer.
Top Reasons to Work with Us
1) Competitive Compensation ($180K - $240K base Depending on Experience)
2) Comprehensive Benefits package including stock options!
3) The chance to join a small start-up tackling challenging problems with huge upside potential!
2) Comprehensive Benefits package including stock options!
3) The chance to join a small start-up tackling challenging problems with huge upside potential!
What You Will Be Doing
- Test bench development using System Verilog UVM
- Test plan and test case development with functional coverage, assertion, coverage property, coverage groups and coverage collections
- Regression setup and debug at RTL level and gate sim level working with the design team
- Test plan and test case development with functional coverage, assertion, coverage property, coverage groups and coverage collections
- Regression setup and debug at RTL level and gate sim level working with the design team
What You Need for this Position
Must have a Bachelor's (Master's or Ph.D. preferred) in Computer Science, Electrical Engineering, Computer Engineering, or similar with 10+ years of experience:
- Design Verification experience
- Deep knowledge of System Verilog, UVM, and verification coverage matrix
- Familiar with Synopsys PCIe/CXL VIP and Mentor Graphics QVIP
- Strong experience with PCIe/CXL protocol (PHY/DLLP/TLP)
- Very familiar with the peripheral protocols such as UART, I2C, SPI Flash
- Proficient in Perl scripting
- Design Verification experience
- Deep knowledge of System Verilog, UVM, and verification coverage matrix
- Familiar with Synopsys PCIe/CXL VIP and Mentor Graphics QVIP
- Strong experience with PCIe/CXL protocol (PHY/DLLP/TLP)
- Very familiar with the peripheral protocols such as UART, I2C, SPI Flash
- Proficient in Perl scripting
So, if you are a Principal ASIC Design Verification Engineer with UVM and PCIe and/or CXL experience, please apply today! or send an updated copy of your resume to Mike.Vandenbergh@CyberCoders.com for immediate consideration!
Benefits
- Medical/Dental/Vision
- PTO/Vacation Days
- Equity
Preferred Skills
VerificationPCIeASIC DesignUVMCXLUARTI2CSPI FlashSynopsysMentor Graphics
Mike Vandenbergh is recruiting for this position
Email me to apply for this position Job ID: MV1-1764814
CyberCoders is an Equal Employment Opportunity Employer.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, age, sexual orientation, gender identity or expression, national origin, ancestry, citizenship, genetic information, registered domestic partner status, marital status, status as a crime victim, disability, protected veteran status, or any other characteristic protected by law. CyberCoders will consider qualified applicants with criminal histories in a manner consistent with the requirements of applicable state and local law, including but not limited to the Los Angeles County Fair Chance Ordinance, the San Francisco Fair Chance Ordinance, and the California Fair Chance Act. CyberCoders is committed to working with and providing reasonable accommodation to individuals with physical and mental disabilities. If you need special assistance or an accommodation while seeking employment, please contact a member of our Human Resources team to make arrangements.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, age, sexual orientation, gender identity or expression, national origin, ancestry, citizenship, genetic information, registered domestic partner status, marital status, status as a crime victim, disability, protected veteran status, or any other characteristic protected by law. CyberCoders will consider qualified applicants with criminal histories in a manner consistent with the requirements of applicable state and local law, including but not limited to the Los Angeles County Fair Chance Ordinance, the San Francisco Fair Chance Ordinance, and the California Fair Chance Act. CyberCoders is committed to working with and providing reasonable accommodation to individuals with physical and mental disabilities. If you need special assistance or an accommodation while seeking employment, please contact a member of our Human Resources team to make arrangements.